Code name
Zambezi
Architecture
1 CPU - 6 Core - 6 Threads
Revision
OR-B2
Technology
32 nm
Family / Model / Stepping
F.1.2 / 15.1
Instructions
MMX(+), SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, x86-64, AMD-V, AES, AVX, XOP, FMA4
Socket
Socket AM3+ (942)
Core frequency
3314.59 MHz
Bus speed
200.88 MHz
Multiplier
16.5
Cache frequency
2008.8 MHz
Level 1 cache
16 KB 4-way
Level 2 cache
2048 KB 16-way
Level 3 cache
8192 KB 64-way
CPU-Z version
1.80.0 (64 bit)
CPU-Z validation